LxWin V6.2.5: New Features
Symmetric Multiprocessing (SMP) Support
Symmetric multiprocessing (SMP) involves a computer hardware with multiple CPUs and a software architecture where two or more of these identical CPUs are connected to a single main memory. Each CPU has full access to the input and output devices of the computer hardware. The whole system is controlled by a single operating system instance that treats all CPUs equally, none of the CPUs are reserved for special purposes. In multi-core processors, the concept of SMP applies to the cores within the processor as if they were separate processors. Almost all PC systems today use an SMP architecture and furthermore the Windows operating system is utilizing this architecture.
- All processors in an SMP architecture contain a common bus and memory. That is why symmetric multiprocessing is known as tightly coupled multiprocessing.
- Each of the CPUs in symmetric multiprocessing are equal and can execute different processes or threads as required no matter where these processes are stored in memory. This is a major difference from asymmetric multiprocessing.
- Depending on the CPU, all the processors may contain an individual first level cache (L1 cache) as well as shared second or third level caches (L2 and L3 cache) in addition to the shared main memory. Caches allow the processors to access data much faster than if it were only in the shared memory. It also reduces the burden on the system bus as most requests for data are handled by the cache.
- Symmetric multiprocessing is useful for multi-processing as well as multi-threading applications because these applications have multiple tasks running in parallel. So these tasks can be scheduled in parallel processors using symmetric multiprocessing.
Most applications for LxWin configure Windows to have all its CPU cores running in SMP mode, and then Linux will be assigned the last CPU core. However, if more computing power is needed in the real-time Linux portion, then the latest version of LxWin now also can be run in SMP mode. This enables assigning more than just the last CPU core to Linux. This greatly enhances the field of applications where LxWin can be used.
To increase the real-time performance of LxWin, tracing is now disabled in the Linux kernel. Furthermore, the kernel image size is reduced which enhances cache utilization.
Network TAP and Bridging Support
To increase TCP/IP functionality, LxWin now supports TAP devices as well as bridging support. These features are required to run the acontis TSN software and other enhanced network applications.
Kernel and C Library Update
LxWin now supports glibc version 2.28 and has been updated to Linux kernel 4.9.113.